ECE552 Fall 2026
Project 1: RISC-V Assembly Language Project 2: Digital Design and Debugging Project 3: Single-Cycle Processor Project 3: Extra Credit - FPGA Demo Project 4: Basic Pipelined Processor Project 5: Forwarding and Branch Prediction Project Schedule Verilog Rules Reference Materials
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Project Schedule

UW—Madison ECE 552: Fall 2026

Release and Due Dates

Projects 4 & 5 are released together, and projects 6 & 7 are released together. Project 8 is optional extra credit. All dates are for Fall 2026; see Gradescope for the exact submission deadline time on each assignment.

Project Released Due
Project 1 9/10 9/17
Project 2 9/17 9/24
Project 3 10/1 10/15
Project 4 10/15 10/29
Project 5 10/15 11/5
Project 6 11/5 11/19
Project 7 11/5 12/1
Project 8 (optional) 11/17 12/8
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  • Release and Due Dates

2026 ECE 552 Course Staff, University of Wisconsin-Madison