ECE552 Fall 2026
Project 1: RISC-V Assembly Language Project 2: Digital Design and Debugging Project 3: Single-Cycle Processor Project 3: Extra Credit - FPGA Demo Project 4: Basic Pipelined Processor Project 5: Forwarding and Branch Prediction Project Schedule Verilog Rules Reference Materials
ECE 552 Course Website

ECE 552: Introduction to Computer Architecture

UW-Madison Fall 2026

Project 1: RISC-V Assembly Language → Project 2: Digital Design and Debugging → Project 3: Single-Cycle Processor → Project 3: Extra Credit - FPGA Demo → Project 4: Basic Pipelined Processor → Project 5: Forwarding and Branch Prediction → Project Schedule → Verilog Rules → Reference Materials →

2026 ECE 552 Course Staff, University of Wisconsin-Madison